ASIC design and implementation of an associative memory processor for syntactic recognition

Author

Correa, Nelson ; Garcia, Antonio ; Burbano, Hugo ; Ricaurte, William

Author_Institution

Dept. of Electr. Eng., Los Andes Univ., Bogota, Colombia

fYear

1994

fDate

19-23 Sep 1994

Firstpage

273

Lastpage

277

Abstract

This paper presents the ASIC design and implementation of a special purpose processor for syntactic recognition of context-free languages. The machine is an associative processor that takes advantage of the single-instruction multiple-data stream (SIMD) parallel processing capability of a content-addressable memory (CAM), designed to operate as a coprocessor in systems with an I.S.A. bus (IBM PC/AT). The processor is designed and implemented with multiple ASIC components, including both a full-custom content-addressable memory device and multiple Programmable Logic Devices (FPGA/PLD)

Keywords

application specific integrated circuits; associative processing; content-addressable storage; context-free languages; coprocessors; parallel processing; programmable logic devices; speech recognition; ASIC design; I.S.A. bus; associative memory processor; content-addressable memory; context-free languages; coprocessor; full-custom content-addressable memory device; multiple ASIC components; multiple programmable logic devices; parallel processing capability; single-instruction multiple-data stream; syntactic recognition; Application specific integrated circuits; Associative memory; Automatic speech recognition; CADCAM; Computer aided manufacturing; Coprocessors; Parallel processing; Process design; Programmable logic devices; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-2020-4

Type

conf

DOI

10.1109/ASIC.1994.404559

Filename

404559