DocumentCode :
3012686
Title :
Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS
Author :
Li, Jinbo ; Chen, Dongpo ; Guan, Rui ; Qin, Peng ; Lu, Zhijian ; Zhou, Jianjun
Author_Institution :
Center for Analog/RF IC (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, 200240, China
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
1291
Lastpage :
1294
Abstract :
the integration of Global Navigation Satellite Systems (GNSS) receiver with other wireless functionalities, e.g., GSM, WCDMA, LTE, Bluetooth, and WiFi, brings up new design challenges due to constrained silicon area and power consumption, and especially the interferences from other wireless functionalities. A dual-channel multi-mode GNSS RF receiver, for reception of GPS-L1, GLONASS-B1, Compass-B1, and Galileo-E1, is proposed to address these challenges. A novel frequency plan and a reconfigurable complex band-pass filter enable the two multi-mode reception channels to share most circuit blocks and thus reduce the power consumption and silicon area. An N-path filter and adaptive gain control is implemented in the RF front-end to reject the out-of-band interferences for high linearity. Designed in a 40nm CMOS, the proposed multi-mode GNSS RF receiver, including the RF front-end, baseband filter and ADC, PLL, and VCO, achieves a total noise figure of 1.7dB, out-of-band (1710MHz) input 1dB compression point of −16.5dBm, while consuming a total power of 13.2mW.
Keywords :
Band pass filters; Gain control; Global Navigation Satellite Systems; Global Positioning System; Multiaccess communication; Radio frequency; Receivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul, Korea (South)
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271475
Filename :
6271475
Link To Document :
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