A multiprogrammed parallel architecture for digital signal processing

A parallel architecture for DSP algorithms is presented along with a corresponding computation method known as address-directed computing. This approach overcomes the large amount of addressing overhead in conventional DSP programs, especially those coded in high level languages. The approach used is to decompose a computation into address and data streams. The address stream is computed using a set of n concurrently operating address processors. An architecture to implement this method is presented as well as an example of programming it.