A mixed-mode voltage-down converter with impedance adjustment circuitry for low-voltage wide-frequency DRAMs

In DRAMs a dramatic operation voltage reduction has been realized by the voltage-down converter (VDC) for a low power dissipation and high reliability. However, in the low-voltage and high-frequency domain this technique will see several crucial problems. Besides, the wide-frequency operation (e.g. an extended data output and a synchronous operation) and the variable-load current (e.g, a variable refresh cycle and a changeable data output) are required. This paper proposes VDC circuit techniques for the low-voltage (less than 2.5 V), wide-frequency, and the variable-load current. The mixed-mode VDC (MM-VDC) provides two-modes of current by the analog VDC (A-VDC) and the digital VDC (D-VDC) supply being suitable for the load current. It also reduces the current consumption in the VDC and guarantees stable operation. Moreover, the impedance adjustment circuitry (IAC) controls the current supply capability of the D-VDC according to the load operation frequency to minimize the bounce of the internal power supply level. The MM-VDC can be applicable to low-voltage wide-frequency DRAMs.