• DocumentCode
    3013410
  • Title

    A 775-µW/fps/view H.264/MVC decoder chip compliant with 3D Blu-ray specifications

  • Author

    Ju, Chi-Cheng ; Liu, Tsu-Ming ; Chang, Yung-Chang ; Wang, Chih-Ming ; Chen, Chun-Chia ; Lin, Hue-Min ; Cheng, Chia-Yun ; Chiu, Min-Hao ; Wang, Sheng-Jen ; Chao, Ping ; Hu, MJ ; Li, Hao-Wei ; Tsai, Chung-Hung

  • Author_Institution
    Mediatek Inc., Headquarter, No.1, Dusing Rd. 1, Hsinchu Science Park, 30078 Taiwan, R.O.C.
  • fYear
    2012
  • fDate
    20-23 May 2012
  • Firstpage
    1440
  • Lastpage
    1443
  • Abstract
    A first-reported, sub-mW/fps/view multi-view video decoder chip fully compliant to 3D Blu-ray specifications is reported. It explores the resource sharing so as to integrate not only single-view MPEG-2/VC-1/AVC but multi-view MVC standards into a single die. Moreover, it features pipeline management and clock management units so as to improve the processing throughput and clock power efficiency. A test chip for not only single-view video but multi-view H.264/MVC decoding has been designed and fabricated using 40nm 1P7M CMOS process with core area 1.22mm2. Core power dissipation is about 46.5mW under 1920×1080 resolution of single view 60fps or stereo-view 30fps.
  • Keywords
    Clocks; Decoding; Power dissipation; Standards; Streaming media; Transform coding; Video coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
  • Conference_Location
    Seoul, Korea (South)
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-0218-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2012.6271516
  • Filename
    6271516
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3013410