DocumentCode :
3014292
Title :
Single-electron tunneling based turnstiles: Modeling and applications
Author :
Ran Xiao ; Chunhong Chen
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON, Canada
fYear :
2013
fDate :
5-8 Aug. 2013
Firstpage :
77
Lastpage :
82
Abstract :
This paper presents a compact analytical model for single-electron tunneling (SET) based turnstiles. This model can accurately describe the process of tunneling events involved. The device characteristics produced by the model are verified by Monte-Carlo simulation with good agreement. Hybrid SET/MOS circuit co-simulations are successfully performed in Spectre simulator by implementing the proposed model with Verilog-A modeling language. Extensive simulation results show the advantages of realizing some application circuits using SET-based turnstiles.
Keywords :
MOS integrated circuits; Monte Carlo methods; hardware description languages; single electron transistors; tunnelling; Monte-Carlo simulation; SET based turnstiles; Spectre simulator; Verilog-A modeling language; application circuits; compact analytical model; hybrid SET-MOS circuit cosimulations; single-electron tunneling; tunneling events; Integrated circuit modeling; Junctions; Phase frequency detector; Simulation; Tin; Transistors; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2013 13th IEEE Conference on
Conference_Location :
Beijing
ISSN :
1944-9399
Print_ISBN :
978-1-4799-0675-8
Type :
conf
DOI :
10.1109/NANO.2013.6720803
Filename :
6720803
Link To Document :
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