Title :
Resonant tunneling through interface traps in nanowire tunneling FET
Author :
Nakamura, Hajime
Author_Institution :
IBM Res. Tokyo, Tokyo, Japan
Abstract :
The tunneling field-effect-transistor (TFET) is very promising for low power CMOS devices due to a steep subthreshold slope typically lower than 60mV/dec. One of the major issues with this structure is the surface states at the gate dielectric interface. In this study a nanowire TFET with InAs-GaSb heterojunction is numerically simulated to examine the ballistic carrier transport affected by those interface sites. By introducing dangling bonds into the GaSb surface atoms, several bound states emerge inside the bandgap. The off-state transmission exhibits sharp peaks at the energy levels of those bound states, which suggests a resonant interband tunneling process from the drain into the channel through the interface traps. This results in an off-state leakage current with no phonon scattering processes. The impact on the gate efficiency and delay time is also discussed based on the interface trap capacitor.
Keywords :
CMOS integrated circuits; III-V semiconductors; capacitors; dangling bonds; field effect transistors; gallium compounds; indium compounds; interface states; low-power electronics; nanowires; resonant tunnelling transistors; surface states; GaSb surface atoms; InAs-GaSb; InAs-GaSb heterojunction; ballistic carrier transport; bound states; dangling bonds; delay time; dielectric interface; interface trap capacitor; low power CMOS devices; nanowire TFET; resonant interband tunneling process; resonant tunneling; surface states; tunneling TFET; tunneling field effect transistor; Capacitors; Delays; Heterojunctions; Logic gates; Performance evaluation; Photonic band gap; Tunneling;
Conference_Titel :
Nanotechnology (IEEE-NANO), 2013 13th IEEE Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4799-0675-8
DOI :
10.1109/NANO.2013.6720817