DocumentCode :
3014768
Title :
An ASIC design for 3D depth control of full HD resolution stereoscopic video
Author :
Yang, Jeong-Hyu ; Im, Jinseok ; Lim, Kyoungwon ; Choi, Seung-Jong
Author_Institution :
DTV SoC Division, SIC Center, LG Electronics Inc., Seoul, Korea
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
1700
Lastpage :
1703
Abstract :
We present an ASIC system that adjusts the depth of a full HD resolution stereoscopic video by generating a new synthesized view video, which enables 3DTV users to control their 3D depth perception. The system consists of function core blocks including preprocessing, stereo matching, and view synthesis, and interface blocks for in/out, MCU and external memory. The system is implemented with TSMC 65nm 1P8M process. Overall die size is 6.9mm × 6.9mm and total power consumption is 1.2W during normal operation.
Keywords :
Application specific integrated circuits; Cameras; Filtering; High definition video; Image resolution; Real time systems; Stereo image processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul, Korea (South)
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271588
Filename :
6271588
Link To Document :
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