DocumentCode
3014819
Title
A speech feature extraction system with a linear processor array
Author
Emori, Teiji ; Tachibana, Masatoshi
Author_Institution
NTT Electrical Communications Laboratories, Tokyo, Japan
Volume
12
fYear
1987
fDate
31868
Firstpage
775
Lastpage
778
Abstract
A speech feature extraction system for speaker-independent continuous phoneme recognition requires high performance in the 50 MIPS range. The vector processes in feature extraction can be mapped into parallel processes on a linear array vhich consists of multiple processing elements (PEs). Each PE takes charge of the processes of each vector element and extracts features by repeating product-and-sum operations and data/ instruction transfers between tvo neighboring PEs, like a systolic array. The system has a hierarchical configuration with one general purpose digital signal processor (DSP) as the upper layer and a linear array as the lower layer. An experimental system with 16 PEs in the Lower layer is shorn to have about 20 times the processing capability of a single-layered system using only one DSP.
Keywords
Data mining; Digital signal processing; Feature extraction; Laboratories; Parallel processing; Signal processing; Speech processing; Speech recognition; Taylor series; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type
conf
DOI
10.1109/ICASSP.1987.1169561
Filename
1169561
Link To Document