Title :
High speed re-configurable pipeline ADC cell design
Author :
Liu, Hui ; Hassoun, Manvan
Author_Institution :
Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
The design and implementation of a high speed reconfigurable pipeline ADC cell is presented in this paper. Each cell in the pipeline can be a sample and hold gain of 1 stage, or gain of 2 as multiplying by 2 stage, or gain of 1.9 stage capable of doing calibration. The design is implemented in TSMC 0.25 μm single-poly CMOS digital process
Keywords :
CMOS integrated circuits; analogue-digital conversion; high-speed integrated circuits; pipeline processing; sample and hold circuits; 0.25 micron; ADC cell design; TSMC; calibration; high speed ICs; reconfigurable pipeline ADC; sample and hold; single-poly CMOS digital process; Analog computers; CMOS process; Calibration; Differential amplifiers; Digital-analog conversion; Optical wavelength conversion; Pipelines; Switched capacitor circuits; Switching circuits; Voltage;
Conference_Titel :
Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-6742-1
DOI :
10.1109/SSMSD.2001.914957
