A first pass ASIC development methodology using logic emulation

Author

Chan, Thomas ; Yeh, Bill ; Hu, Eileen

Author_Institution

Apple Comput. Inc., Santa Clara, CA, USA

fYear

1994

fDate

19-23 Sep 1994

Firstpage

214

Lastpage

218

Abstract

This paper describes a printer controller design utilizing a logic emulator to verify the functionality of the ASIC prior to fabrication. The utilization of logic emulation for ASIC prototyping enables both hardware and software development as well as system verification to proceed in parallel. This methodology allowed Apple to develop a new printer controller ASIC with first pass success, significantly shorten development time of the whole printer system, and reduce the project cost and potential risks

Keywords

application specific integrated circuits; circuit analysis computing; field programmable gate arrays; hardware description languages; logic CAD; ASIC functionality; Apple; CAD; HDL; development time; first pass ASIC development; hardware development; logic emulation; printer controller design; software development; system verification; Application specific integrated circuits; Control systems; Costs; Emulation; Fabrication; Hardware; Logic design; Printers; Programming; Software prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-2020-4

Type

conf

DOI

10.1109/ASIC.1994.404573

Filename

404573

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3015110