DocumentCode
3015239
Title
Stream-access-oriented baseband signal processors for SDR
Author
Takeuchi, Toshiki ; Igura, Hiroyuki ; Ikekawa, Masao
Author_Institution
System IP Core Research Labs., NEC Corporation, Kawasaki, Kanagawa 211-8666, Japan
fYear
2012
fDate
20-23 May 2012
Firstpage
1795
Lastpage
1798
Abstract
This paper presents a baseband processor developed for SDR that supports such wireless modes as WLAN, WiMAX, W-CDMA, and LTE. To achieve both the high area-efficiency of dedicated hardware and the high flexibility of DSP, we have developed a hetero-multi-processor architecture that maps each processing task either to a newly developed stream-access-oriented processor or to a parameterized hardware engine. Our design achieves 3.8 times faster baseband processing than does conventional DSP, while still maintaining high flexibility and scalability for SDR. Further, our execution controller provides faster total processing time (23% faster in an LTE design) and more flexible multi-core execution control.
Keywords
Baseband; Digital signal processing; Encoding; Engines; Hardware; Process control; Program processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul, Korea (South)
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271614
Filename
6271614
Link To Document