Analog VLSI for implementation of a “hyperassociative memory” neural network

Existing associative memory neural networks suffer from many limitations in terms of viable pattern types, storage density and scalability, and relatively little has been done in the way of hardware implementation This paper introduces the “hyperassociative memory”, which is a new neural network architecture as well as an effective paradigm for associating multiple elements or atoms of knowledge in a way that is adaptive, efficient, and massively scalable. The new architecture consists of two key components: a new type of analog neuron, named a “correlator neuron”, and a “circadian state bus”. In addition to associating multiple elements, the network has the ability to maintain global and local temporal references, store and recall chronological sequences, associate dissimilar patterns, and dynamically modulate recall characteristics. The details of this architecture are described as well as a prototype analog VLSI implementation of the approach