DocumentCode
3016331
Title
On the test of microprocessor IP cores
Author
Corno, F. ; Reorda, M. Sonza ; Squillero, G. ; Violante, M.
Author_Institution
Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
fYear
2001
fDate
2001
Firstpage
209
Lastpage
213
Abstract
Testing is a crucial issue in SOC development and production process. A popular solution for SOCs that include microprocessor cores is based on making them execute a test program. Thus, implementing a very attractive BIST solution. This paper describes a method for the generation of effective programs for the self-test of a processor. The method can be partially automated and combines ideas from traditional functional approaches and from the ATPG field. We assess the feasibility and effectiveness of the method by applying it to a 8051 core
Keywords
automatic test pattern generation; built-in self test; computer testing; industrial property; integrated circuit testing; microprocessor chips; 8051 core; ATPG; BIST; SOC development; effectiveness; feasibility; microprocessor IP cores; self-test; Automatic test pattern generation; Automatic testing; Built-in self-test; Microprocessors; Performance evaluation; Production; Random access memory; Read-write memory; Software testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location
Munich
ISSN
1530-1591
Print_ISBN
0-7695-0993-2
Type
conf
DOI
10.1109/DATE.2001.915026
Filename
915026
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