Title :
Slicing tree is a complete floorplan representation
Author :
Lai, Minghorng ; Wong, D.E.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Abstract :
Slicing tree has been an effective tool for VLSI floorplan design. Floorplanners using slicing tree representation take full advantage of shape and orientation flexibility of circuit modules to find highly compact slicing floorplans. However, slicing floorplans are commonly believed to suffer from poor utilization of space when all modules are hard. For this reason, a large body of literature has recently been devoted to various new representations of non-slicing floorplans to improve space utilization. In this paper, we prove that by using slicing tree representation and compaction, all maximally compact placements of modules can be generated. In conclusion, slicing tree is a complete floorplan representation for all non-slicing floorplans as well
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; network topology; trees (mathematics); VLSI floorplan design; circuit modules; compaction; floorplan representation; highly compact slicing floorplans; maximally compact placements; nonslicing floorplans; slicing tree representation; Compaction; Design automation; Fabrication; Flexible printed circuits; Integrated circuit interconnections; Process design; Shape; Timing; Very large scale integration;
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
Print_ISBN :
0-7695-0993-2
DOI :
10.1109/DATE.2001.915030
