DocumentCode :
3016448
Title :
Structure generation and design of tracking ADCs
Author :
Shaker, Mohamed O. ; Bayoumi, Magdy A.
Author_Institution :
Univ. of Louisiana at Lafayette, Lafayette, LA, USA
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
2011
Lastpage :
2014
Abstract :
In this paper, a new model for a low power CMOS current-mode Tracking Analog-to-Digital Converter (ADC) is proposed. The model generates several designs that differ in power consumption and signal bandwidth specifications. As an example, A 6-bit ADC, with a maximum acquisition speed of 130 MHz, is implemented in a 1 V analog supply voltage. Spectre simulation results for the proposed tracking ADC verifying the analytical results are also given. It shows that the circuit consumes a static power of 0.63 mW and a dynamic power of 0.49 mW in a commercial 90 nm CMOS process.
Keywords :
CMOS integrated circuits; analogue-digital conversion; integrated circuit design; Spectre simulation; analog supply voltage; frequency 130 MHz; low power CMOS current-mode tracking ADC; low power CMOS current-mode tracking analog-to-digital converter; power 0.49 mW; power 0.63 mW; power consumption; signal bandwidth specifications; size 90 nm; structure generation; voltage 1 V; word length 6 bit; Bandwidth; CMOS integrated circuits; Clocks; Power demand; Signal resolution; Simulation; Solid state circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271674
Filename :
6271674
Link To Document :
بازگشت