Abstract :
Conference proceedings front matter may contain various advertisements, welcome messages, committee or program information, and other miscellaneous conference information. This may in some cases also include the cover art, table of contents, copyright statements, title-page or half title-pages, blank pages, venue maps or other general information relating to the conference that was part of the original conference proceedings.
Keywords :
VLSI; analogue integrated circuits; asynchronous circuits; circuit layout; circuit optimisation; circuit simulation; embedded systems; field programmable gate arrays; industrial property; integrated circuit design; integrated circuit interconnections; logic CAD; low-power electronics; network routing; timing; BIST; DSPs; FPGAs; IP-based design; RTL circuit simulation; analogue synthesis; asynchronous logic; combinatorial problems; deep-submicron design; design reuse; embedded systems; floorplanning; functional verification; high-level synthesis; interconnect modelling; logic synthesis; low-power design; model reduction; passive components; power optimisation; reconfigurable systems; routing; symbolic model checking; timing analysis;
