DocumentCode
3017195
Title
Robust Built-In Test of RF ICs Using Envelope Detectors
Author
Han, Donghoon ; Chatterjee, Abhijit
Author_Institution
Georgia Inst. of Technol., Atlanta, GA
fYear
2005
fDate
21-21 Dec. 2005
Firstpage
2
Lastpage
7
Abstract
To address growing production test costs, a low-cost built-in test solution for RF circuits is proposed that is robust to process, supply voltage and temperature variations (PVT variations). The test solution consists of measuring the envelope of the output response to a two-tone test stimulus. This is a relatively low frequency signal compared to the nominal frequency of the RF device under test (DUT) and can therefore be sampled using an on-chip ADC. The resulting test response waveform is analyzed using wavelet transforms. The corresponding wavelet coefficients are used to accurately predict the test specification values of the RF DUT in the presence of noise. The proposed test approach has been demonstrated for a 2.4GHz low noise amplifier designed in a 0.18mum CMOS process and shows high prediction accuracy for the test specifications of the DUT in the presence of noise and PVT variations
Keywords
CMOS integrated circuits; UHF amplifiers; analogue-digital conversion; built-in self test; integrated circuit testing; low noise amplifiers; radiofrequency integrated circuits; system-on-chip; wavelet transforms; 0.18 micron; 2.4 GHz; PVT variations; RF device under test; RF integrated circuits; envelope detectors; low noise amplifier; on-chip ADC; production test costs; robust built-in test; two-tone test stimulus; wavelet transforms; Built-in self-test; Circuit testing; Costs; Envelope detectors; Production; RF signals; Radio frequency; Robustness; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2005. Proceedings. 14th Asian
Conference_Location
Calcutta
ISSN
1081-7735
Print_ISBN
0-7695-2481-8
Type
conf
DOI
10.1109/ATS.2005.95
Filename
1575397
Link To Document