DocumentCode
3017555
Title
Crosstalk Fault Detection for Interconnection Lines Based on Path Delay Inertia Principle
Author
Wu, Ming-Shae ; Lee, Chung-Len ; Chang, Yeong-Jar ; Wu, Wen-Ching
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu
fYear
2005
fDate
21-21 Dec. 2005
Firstpage
106
Lastpage
111
Abstract
The crosstalk fault becomes more and more important in the deep submicron SoC and its detection involves sophisticated timing measurement. In this paper, a new test scheme to detect the crosstalk fault, based on the path delay inertia, for interconnection lines in SoC is proposed. The scheme, without using timing measurement, applies a transition on the aggressor line and a critical width pulse, CWP, to the victim line and detects the propagation of the CWP at the output of the victim line. The scheme is simple and simulation analysis and experiments show that it is effective in detecting crosstalk faults
Keywords
crosstalk; delays; fault diagnosis; integrated circuit interconnections; integrated circuit testing; system-on-chip; aggressor line; critical width pulse propagation; crosstalk fault detection; deep submicron SoC; interconnection lines; path delay inertia principle; timing measurement; victim line; Analytical models; Circuit faults; Circuit testing; Crosstalk; Delay; Electrical fault detection; Fault detection; Integrated circuit interconnections; Space vector pulse width modulation; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2005. Proceedings. 14th Asian
Conference_Location
Calcutta
ISSN
1081-7735
Print_ISBN
0-7695-2481-8
Type
conf
DOI
10.1109/ATS.2005.41
Filename
1575415
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