Hardware/software codesign for digital communication processing

The use of specialised VLSI circuits, called here communication circuits, can achieve a higher bit rate treatment of digital communication processing (DCP). These are more suitable for the implementation of low-level communication protocols (Mac-Transport). In this paper, we present a first approach to hardware/software codesign for the implementation of DCP. The codesign system is based on a flexible architectural model that performs three separate tasks: the real-time processing, the deferred real-time processing and the deferred processing. A hardware/software partitioning technique is based on a timing decision which permits one to perform task distribution