DocumentCode :
3018024
Title :
VEAP: Global optimization based efficient algorithm for VLSI placement
Author :
Tianming, Kong ; Xianlong, Hong ; Changge, Qiao
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear :
1997
fDate :
28-31 Jan 1997
Firstpage :
277
Lastpage :
280
Abstract :
In this paper we present a very simple, efficient while effective placement algorithm for Row-based VLSIs. This algorithm is based on strict mathematical analysis, and provably can find the global optima. From our experiments, this algorithm is one of the fastest algorithms, especially for very large scale circuits. Another point desired to point out is that our algorithm can be run in both wirelength and timing-driven modes
Keywords :
VLSI; circuit layout CAD; mathematical analysis; optimisation; Row-based VLSIs; VEAP; VLSI placement algorithm; global optima; global optimization; mathematical analysis; timing-driven modes; wirelength modes; Circuit simulation; Computer science; Iterative algorithms; Large-scale systems; Mathematical analysis; Partitioning algorithms; Process design; Quadratic programming; Simulated annealing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location :
Chiba
Print_ISBN :
0-7803-3662-3
Type :
conf
DOI :
10.1109/ASPDAC.1997.600151
Filename :
600151
Link To Document :
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