• DocumentCode
    3018125
  • Title

    Concurrent Test Generation

  • Author

    Agrawal, Deepak

  • fYear
    2005
  • fDate
    18-21 Dec. 2005
  • Firstpage
    294
  • Lastpage
    299
  • Abstract
    We define a new type of test, called "concurrent test," for a combinational circuit. Given a set of target faults, a concurrent-test is an input vector that detects all (or most) faults in the set. When concurrent tests are generated for fault sets obtained from independence fault collapsing, minimal or near-minimal tests can be expected. This paper gives new simulation-based methods for independence fault collapsing and for deriving concurrent tests using single-fault ATPG.
  • Keywords
    Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Compaction; Electrical fault detection; Fault detection; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2005. Proceedings. 14th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-2481-8
  • Type

    conf

  • DOI
    10.1109/ATS.2005.39
  • Filename
    1575445