DocumentCode :
3018289
Title :
Soft scheduling in high level synthesis
Author :
Zhu, Jianwen ; Gajski, Daniel D.
Author_Institution :
Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
fYear :
1999
fDate :
1999
Firstpage :
219
Lastpage :
224
Abstract :
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers, soft schedulers make soft decisions at a time, or decisions that can be adjusted later. Soft scheduling has a potential to alleviate the phase coupling problem that has plagued traditional high level synthesis (HLS), HLS for deep submicron design and VLIW code generation. We then develop a specific soft scheduling formulation, called threaded schedule, under which a linear, optimal (in the sense of online optimality) algorithm is guaranteed
Keywords :
circuit optimisation; directed graphs; high level synthesis; integrated circuit design; scheduling; VLIW code generation; deep submicron design; directed acyclic graph; high level synthesis; linear optimal algorithm; online optimality; phase coupling problem; precedence graph; resource constrained retiming; resource constrained technology mapping; soft decision making; soft scheduling; threaded schedule; Computer science; Delay estimation; High level synthesis; Microarchitecture; Permission; Processor scheduling; Registers; Scheduling algorithm; VLIW; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location :
New Orleans, LA
Print_ISBN :
1-58113-092-9
Type :
conf
DOI :
10.1109/DAC.1999.781315
Filename :
781315
Link To Document :
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