DocumentCode :
3018473
Title :
Two approaches for developing generic components in VHDL
Author :
Stuikys, Vytautas ; Ziberkas, Giedrius ; Damasevicius, Robertas ; Majauskas, Giedrius
Author_Institution :
Dept. of Software Eng., Kaunas Univ. of Technol., Lithuania
fYear :
2001
fDate :
2001
Firstpage :
800
Abstract :
We consider the one- and two-language approaches (1LA & 2LA) for developing generic components (GCs) for VHDL generators. By 1LA & 2LA we mean a generalization using “pure” VHDL, or using the VHDL abstractions mixed with Open PROMOL, the external scripting language we have developed for building GCs and generators, respectively. We present the evaluation of both approaches
Keywords :
hardware description languages; logic CAD; software libraries; Open PROMOL; VHDL abstractions; external scripting language; generic components; one-language approach; pure VHDL; two-language approach; Certification; Documentation; Gain measurement; Libraries; Printing; Software engineering; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings
Conference_Location :
Munich
ISSN :
1530-1591
Print_ISBN :
0-7695-0993-2
Type :
conf
DOI :
10.1109/DATE.2001.915126
Filename :
915126
Link To Document :
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