• DocumentCode
    3018525
  • Title

    Efficient Constraint Extraction for Template-Based Processor Self-Test Generation

  • Author

    Kambe, Kazuko ; Inoue, Michiko ; Fujiwara, Hideo ; Iwagaki, Tsuyoshi

  • Author_Institution
    Nara Institute of Science and Technology, Kansai Science City , Japan
  • fYear
    2005
  • fDate
    18-21 Dec. 2005
  • Firstpage
    444
  • Lastpage
    449
  • Abstract
    This paper presents efficient method to extract constraints from a test program template and synthesize a test program using constraint circuits. A test program template is an instruction sequence with unspecified operands, and represents paths for justification of test patterns and observation of test responses for a module under test (MUT). The constraint circuit represents a relation between operand values and inputs/output of the MUT, therefore it enables to obtain operand values using a standard automatic test pattern generator. Experimental results show that the proposed method generates accurate and compact constraint circuits, and we obtain high fault efficiency.
  • Keywords
    Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Data mining; Information science; Software testing; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2005. Proceedings. 14th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-2481-8
  • Type

    conf

  • DOI
    10.1109/ATS.2005.52
  • Filename
    1575470