DocumentCode
3018598
Title
Defect-Oriented Test for Ultra-Low DPM
Author
Iyengar, Vikram ; Nigh, Phil
Author_Institution
IBM Microelectronics, US
fYear
2005
fDate
18-21 Dec. 2005
Firstpage
455
Lastpage
455
Abstract
Business demand for ultra-low defects-permillion (DPM) levels and the emergence of subtle defects that often manifest as functional errors only in the presence of certain specific environmental conditions such as crosstalk, have led to a critical need for intelligent, adaptive, and targeted defectoriented test. The classical model of test, in which integrated circuits (ICs) are subjected to a blanket suite of stuck-fault, transition and Iddq test patterns generated without consideration to layout and chip-to-chip differences are now insufficient to bring DPM levels for cutting-edge ICs down to the requisite 10-100 range demanded by qualityconscious customers.
Keywords
Circuit faults; Circuit testing; Clocks; Crosstalk; Integrated circuit modeling; Integrated circuit testing; Manufacturing; Microelectronics; Rivers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2005. Proceedings. 14th Asian
ISSN
1081-7735
Print_ISBN
0-7695-2481-8
Type
conf
DOI
10.1109/ATS.2005.44
Filename
1575475
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