• DocumentCode
    3018740
  • Title

    Challenges in Next Generation Mixed-Signal IC Production Testing

  • Author

    Cherubal, Sasikumar

  • Author_Institution
    Test Engineering, Wiquest Communications
  • fYear
    2005
  • fDate
    18-21 Dec. 2005
  • Firstpage
    466
  • Lastpage
    466
  • Abstract
    This talk will introduce the general challenges faced in high volume production test, and describe how they apply to the testing of the next generation mixed signal ASICs. In general, a test engineer has 4 things he wants to optimize: (1) Test cost, (2) Yield, (3) Time to volume/Time to Market, and (4) Defective-Parts-Per- Million (DPPM) of shipped devices. The relative importance of each of these goals depends on market segment, maturity of the product and a host of other factors. Test cost is minimized by optimizing test time, and by choosing low-cost test platforms. There are also other factors involved in test cost, including burnin requirements and the need for testing at multiple temperatures. Optimization of yield and DPPM often involves improving test reliability to minimize guardbands, as well as ensuring high test coverage. Timeto- volume constraints, often imposed by market requirements, put severe pressure on test engineers to develop reliable low-cost test solutions in minimum time.
  • Keywords
    Analog-digital conversion; Bandwidth; Cost function; Electronic mail; Integrated circuit testing; Narrowband; Production; Radio frequency; Temperature; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 2005. Proceedings. 14th Asian
  • ISSN
    1081-7735
  • Print_ISBN
    0-7695-2481-8
  • Type

    conf

  • DOI
    10.1109/ATS.2005.34
  • Filename
    1575483