CMOS front end RF amplifier with on-chip tuning

Author

Abou-Allam, E. ; El-Masry, E.I. ; Manku, T.

Author_Institution

Dept. of Electr. Eng., Tech. Univ., Halifax, NS, Canada

Volume

1

fYear

1996

fDate

12-15 May 1996

Firstpage

148

Abstract

In this paper we present a CMOS front-end amplifier with on chip tuning circuitry. The design is targeted towards applications in wireless RF communications. In the design, integrated inductors are used to provide frequency tuning and impedance matching capabilities. Negative resistance is used to compensate for the losses in these inductors in order to achieve reasonable quality factors. Two amplifiers of the same topology were designed using a 1.5 μm p-well process to operate at 900 MHz and 1.9 GHz. Simulation using HSPICE show that quality factors exceeding 20 are possible. The amplifiers provide gains of 23 dB and noise figures of approximately 5 dB

Keywords

CMOS analogue integrated circuits; Q-factor; UHF amplifiers; UHF integrated circuits; circuit tuning; impedance matching; 1.5 micron; 1.9 GHz; 23 dB; 5 dB; 900 MHz; CMOS front end RF amplifier; HSPICE simulation; frequency tuning; gain; impedance matching; integrated inductors; negative resistance; noise figure; on chip tuning circuitry; p-well process; quality factor; topology; wireless RF communications; Circuit optimization; Circuit topology; Gain; Impedance matching; Inductors; Q factor; Radio frequency; Radiofrequency amplifiers; Tuning; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on

Conference_Location

Atlanta, GA

Print_ISBN

0-7803-3073-0

Type

conf

DOI

10.1109/ISCAS.1996.539830

Filename

539830