Title :
Behavior of triple gate Bulk FinFETs with and without DTMOS operation
Author :
De Andrade, Maria Glória Caño ; Martino, João Antonio ; Aoulaiche, Marc ; Collaert, Nadine ; Simoen, Eddy ; Claeys, Cor
Author_Institution :
Imec, Leuven, Belgium
Abstract :
In this paper, the combination of the Dynamic Threshold (DT) voltage technique with a non-planar structure is experimentally studied in triple gate FinFETs. The threshold voltage, subthreshold swing, transconductance, conductance, resistance and Drain Induced Barrier Lowering (DIBL) will be analyzed in the DT mode and the standard biasing configuration. The results indicate that the DTMOS FinFET structure shows superior characteristics and a larger transistor efficiency, which is desirable for high performance low-power/low-voltage applications.
Keywords :
MOSFET; low-power electronics; DTMOS operation; drain induced barrier lowering; dynamic threshold voltage; low-power/low-voltage applications; nonplanar structure; subthreshold swing; transconductance; triple gate bulk FinFET; FinFETs; Logic gates; Resistance; Threshold voltage; Transconductance; Voltage measurement;
Conference_Titel :
Ultimate Integration on Silicon (ULIS), 2011 12th International Conference on
Conference_Location :
Cork
Print_ISBN :
978-1-4577-0090-3
Electronic_ISBN :
978-1-4577-0089-7
DOI :
10.1109/ULIS.2011.5757951
