DocumentCode :
3019861
Title :
Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms
Author :
Jidin, Razali ; Andrews, David ; Peck, Wesley ; Chirpich, Dan ; Stout, Kevin ; Gauch, John
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Kansas Univ., Lawrence, KS, USA
fYear :
2005
fDate :
04-08 April 2005
Abstract :
Hybrid chips containing both CPU´s and FPGA components promise the potential of providing a unified platform for seamless implementation of hardware and software co-designed components. Realizing the potential of these new hybrid chips requires new high level programming model capabilities that support a far more integrated view of the CPU and FPGA components than is achievable with current methods. The KU Hybrid Threads project has been investigating extending the familiar multithreaded programming model across this CPU/FPGA boundary to support both FPGA based hardware and CPU based software threads. Adopting this generalized multithreaded model can lead to programming productivity improvement, while at the same time providing the benefit of customized hardware from within a familiar software programming model. In this paper we present an application study of our hybrid multithreaded model. We have implemented several image-processing functions in both hardware and software, but from within the common multithreaded programming model on a XILINX V2P7 FPGA. This example demonstrates hardware and software threads executing concurrently using standard multithreaded synchronization primitives transforming real-time images captured by a camera and display it on a workstation.
Keywords :
field programmable gate arrays; hardware-software codesign; image processing; multi-threading; CPU based software thread; FPGA component; hardware-software codesign; high level programming model; hybrid chip; hybrid multithreading programming model; image processing transform; real-time image; software programming model; Application software; Cameras; Field programmable gate arrays; Functional programming; Hardware; Image processing; Multithreading; Productivity; Software standards; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
Print_ISBN :
0-7695-2312-9
Type :
conf
DOI :
10.1109/IPDPS.2005.206
Filename :
1420008
Link To Document :
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