• DocumentCode
    3020140
  • Title

    Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis

  • Author

    Smith, Melissa C. ; Vetter, Jeffery S. ; Liang, Xuejun

  • Author_Institution
    Oak Ridge Nat. Lab., TN, USA
  • fYear
    2005
  • fDate
    04-08 April 2005
  • Abstract
    Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software solution. Recently, the capacities of reconfigurable computing devices, like field programmable gate arrays, have risen to levels that make it possible to execute 64b floating-point operations. SRC Computers has designed the SRC-6 MAPstation to blend the benefits of commodity processors with the benefits of reconfigurable computing. In this paper, we describe our effort to accelerate the performance of several scientific applications on the SRC-6. We describe our methodology, analysis, and results. Our early evaluation demonstrates that the SRC-6 provides a unique software stack that is applicable to many scientific solutions and our experiments reveal the performance benefits of the system.
  • Keywords
    field programmable gate arrays; performance evaluation; reconfigurable architectures; SRC-6 MAPstation; SRC-6 reconfigurable computer; field programmable gate array; floating-point operation; scientific application; software stack; Acceleration; Application software; Computer architecture; Field programmable gate arrays; Hardware; Laboratories; Microprocessors; Performance analysis; Signal processing algorithms; Software performance; Performance Analysis; Reconfigurable Computing; Scientific Applications;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
  • Print_ISBN
    0-7695-2312-9
  • Type

    conf

  • DOI
    10.1109/IPDPS.2005.75
  • Filename
    1420016