Analysis and design of ESD protection circuits for high-frequency/RF applications

Author

Ito, Choshu ; Banerjee, Kaustav ; Dutton, Robert W.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

fYear

2001

fDate

2001

Firstpage

117

Lastpage

122

Abstract

Electrostatic discharge (ESD) protection devices can have an adverse effect on the performance of high frequency and RF circuits. This work presents for the first time, an S-parameter based analysis of the performance of RF circuits with various ESD protection designs. Additionally, a design methodology for distributed ESD protection using coplanar waveguides is developed to achieve a better impedance match over a broad frequency range. By using this technique, an ESD device with a parasitic capacitance of 200 fF will attenuate the signal power by only 0.27 dB at 10 GHz

Keywords

MMIC; S-parameters; UHF integrated circuits; coplanar waveguides; distributed parameter networks; electrostatic discharge; equivalent circuits; integrated circuit design; protection; 0 to 10 GHz; CPW; ESD protection circuits; ESD protection devices; RF applications; S-parameter based analysis; coplanar waveguides; design methodology; distributed ESD protection; electrostatic discharge protection; high-frequency applications; impedance match; onchip protection circuits; Circuits; Coplanar waveguides; Design methodology; Electrostatic discharge; Impedance; Parasitic capacitance; Performance analysis; Protection; Radio frequency; Scattering parameters;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality Electronic Design, 2001 International Symposium on

Conference_Location

San Jose, CA

Print_ISBN

0-7695-1025-6

Type

conf

DOI

10.1109/ISQED.2001.915215

Filename

915215