DocumentCode
3020440
Title
Hardware-efficient random sampling of fourier-sparse signals
Author
Maechler, Patrick ; Felber, Norbert ; Kaeslin, Hubert ; Burg, Andreas
Author_Institution
Integrated Syst. Lab., ETH Zurich, Zurich, Switzerland
fYear
2012
fDate
20-23 May 2012
Firstpage
269
Lastpage
272
Abstract
Spectrum sensing, i.e. the identification of occupied frequencies within a large bandwidth, requires complex sampling hardware. Measurements suggest that only a small fraction of the available spectrum is actually used at any time and place, which allows a sparse characterization of the frequency domain signal. Compressed sensing (CS) can exploit this sparsity and simplify measurements. We investigate the performance of a very simple hardware architecture based on the slope analog-to-digital converter (ADC), which allows to sample signals at unevenly spaced points in time. CS algorithms are used to identify the occupied frequencies, which can be continuously distributed across a large bandwidth.
Keywords
analogue-digital conversion; compressed sensing; sampling methods; ADC; CS; Fourier-Sparse signals; complex sampling hardware; compressed sensing; frequency domain signal; hardware architecture; hardware-efficient random sampling; slope analog-to-digital converter; sparse characterization; spectrum sensing; Bandwidth; Delay; Dictionaries; Frequency domain analysis; Hardware; Propagation delay; Reconstruction algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271862
Filename
6271862
Link To Document