Analysis of Hardware Acceleration in Reconfigurable Embedded Systems

Embedded designers now have the capability of offloading software routines into custom application specific hardware blocks. This paper evaluates a domain-specific design system for configurable computing platforms that combine processors and configurable fabrics. Although the proposed work uses floating-point and communication primitives as the specific domain tasks evaluated, the reconfigurable computing platform and the design challenges addressed will become increasingly common in a number of embedded system environments. This paper explores the added cost of hardware resources, area, and power of moving software library routines into hardware blocks in a configurable embedded system based on the MicroBlaze soft processor.