DocumentCode
3020768
Title
Performance investigation of short-channel junctionless multigate transistors
Author
Razavi, P. ; Fagas, G. ; Ferain, I. ; Akhavan, N. Dehdashti ; Yu, R. ; Colinge, J.P.
Author_Institution
Tyndall Nat. Inst., Univ. Coll. Cork, Lee Maltings, Ireland
fYear
2011
fDate
14-16 March 2011
Firstpage
1
Lastpage
3
Abstract
In this paper we investigate the performance of short channel junctionless gate-all-around (GAA) transistors, by comparing the I_V characteristics, subthreshold swing and drain-induced barrier lowering (DIBL) of junctionless GAA transistors with accumulation-mode GAA transistors. We also compare the I_V characteristics of junctionless GAA transistors for different wafer and transport orientations. MuGFETs are investigated for different wafer and channel orientation.
Keywords
field effect transistors; I-V characteristics; MuGFET; accumulation-mode GAA transistors; drain-induced barrier lowering; short channel junctionless gate-all-around transistors; short-channel junctionless multigate transistors; subthreshold swing; Doping; Junctions; Logic gates; Semiconductor device modeling; Semiconductor process modeling; Solid modeling; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultimate Integration on Silicon (ULIS), 2011 12th International Conference on
Conference_Location
Cork
Print_ISBN
978-1-4577-0090-3
Electronic_ISBN
978-1-4577-0089-7
Type
conf
DOI
10.1109/ULIS.2011.5758005
Filename
5758005
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