Title :
A low-power and domain-specific reconfigurable FFT fabric for system-on-chip applications
Author :
Zhao, Yutian ; Erdogan, Ahmet T. ; Arslan, Tughrul
Author_Institution :
Sch. of Eng. & Electron., Edinburgh Univ., UK
Abstract :
A low-power dynamic reconfigurable FFT fabric is proposed in this paper. The architecture is served as a scalable IP core, which is suitable for system on chip applications. The system can be configured as 16, 32, 64, 128, 256, 512 and 1024-point FFT. Compared with a conventional ASIC FFT processor, this FFT fabric is characterized by having dynamic reconfigurability while incurring only a 12 ∼ 19% increase in energy consumption, and requiring 14% more area than a 1024-point non-reconfigurable FFT fabric. On the other hand, compared with a FFT processor which is mapped onto a general purpose reconfigurable architecture, it has 30 ∼ 94% less energy consumption.
Keywords :
fast Fourier transforms; low-power electronics; power consumption; reconfigurable architectures; system-on-chip; ASIC FFT processor; IP core; domain-specific reconfigurable FFT fabric; energy consumption; fast Fourier transform; system-on-chip; Application specific integrated circuits; Digital signal processing; Energy consumption; Fabrics; Field programmable gate arrays; Hardware; Reconfigurable architectures; Signal processing algorithms; Switches; System-on-a-chip;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
Print_ISBN :
0-7695-2312-9
DOI :
10.1109/IPDPS.2005.39
