• DocumentCode
    3020797
  • Title

    Programming configurable multiprocessors

  • Author

    Guccione, Steven A.

  • Author_Institution
    Cmpware Inc., Austin, TX, USA
  • fYear
    2005
  • fDate
    4-8 April 2005
  • Abstract
    A new high performance computation technique involving multiple processors on a single silicon die is quickly gaining popularity. This new design approach provides very high performance, excellent power efficiency and a high level of programmability as compared to other existing solutions. This approach also serves to move the design effort away from hardware design and toward software. This results in a faster time to market as well as a lower up-front design cost. This paper discusses the configurable multiprocessor design environment from Cmpware, Inc. This toolkit is used to design ASIC, FPGA and SoC multiprocessor solutions.
  • Keywords
    field programmable gate arrays; logic design; microprocessor chips; multiprocessing systems; parallel programming; programming environments; reconfigurable architectures; ASIC; FPGA; SoC multiprocessor solutions; configurable multiprocessor design environment; high performance computation technique; Distributed processing; Parallel programming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
  • Print_ISBN
    0-7695-2312-9
  • Type

    conf

  • DOI
    10.1109/IPDPS.2005.364
  • Filename
    1420040