Title :
Analysis and Modeling of the Glitch Error in Current-Steering D/A Converter
Author :
Hong-Wei, Si ; Le-nian, He
Author_Institution :
Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China
Abstract :
For a high-speed and high-resolution current-steering D/A Converter (DAC), Spurious-Free dynamic range (SFDR) becomes a major limiting factor for its performance. This paper gives an overall analysis of its dynamic error due to non-ideal switching behavior and identifies the link between the 3rd or higher order harmonic distortion and digital encoding scheme for the first time so far as our knowledge. A behavioral model of non-ideal current-steering DAC is developed to estimate its SFDR property. A 12-bit up to 1GS/s transistor-level circuit of current-steering DAC is designed using 0.18 um CMOS Mixed-Signal process. The simulation result demonstrates the validation of the established behavior model.
Keywords :
CMOS integrated circuits; digital-analogue conversion; harmonic distortion; integrated circuit design; integrated circuit modelling; mixed analogue-digital integrated circuits; CMOS mixed-signal process; behavior model; current-steering D/A converter; digital encoding scheme; dynamic error; glitch error; higher order harmonic distortion; nonideal current-steering DAC; nonideal switching behavior; size 0.18 mum; spurious-free dynamic range; transistor-level circuit; word length 12 bit; Encoding; Equations; Harmonic distortion; Integrated circuit modeling; Mathematical model; Switches; Switching circuits; SFDR; current-steering DAC; glitch error; modeling;
Conference_Titel :
Electrical and Control Engineering (ICECE), 2010 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-6880-5
DOI :
10.1109/iCECE.2010.109
