Identification of linear sequential machines

A simple and fast algorithm for the identification of multi-input/multi-output linear sequential machines which are defined over Boolean rings is developed and demonstrated. The only information required a priori is an upper bound on system order and a specification that the transfer matrix be polynomial in the delay operation. The identification process is immediate via inspection of the output whereby the columns of the transfer matrix are generated sequentially in time. Only the operation of counting is involved, and total computing time is essentially limited by the maximum allowable input data rate for the system under test.