A pass transistor regular structure for implementing multi-level combinational circuits

Author

Neves, José Luis ; Albicki, Alexander

Author_Institution

Dept. of Electr. Eng., Rochester Univ., NY, USA

fYear

1994

fDate

19-23 Sep 1994

Firstpage

88

Lastpage

91

Abstract

Implementation of multi-level combinational circuits using pass transistors and transmission gates is presented. The circuits are built with a new set of pass transistor gates, creating a network with well defined logic values at any node. A method to identify certain logic patterns is presented with the goal to reduce the number of pass transistor gates required to implement a logic function. SPICE simulations verified by the simulation of an example circuit show significant speed improvements for combinational circuits designed with pass transistor gates

Keywords

SPICE; application specific integrated circuits; circuit analysis computing; combinational circuits; integrated circuit layout; logic arrays; logic design; SPICE simulations; logic function; multilevel combinational circuits; pass transistor gates; pass transistor regular structure; transmission gates; Application specific integrated circuits; Circuit simulation; Combinational circuits; Logic design; Logic functions; Logic gates; Programmable logic arrays; SPICE; Sparse matrices; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-2020-4

Type

conf

DOI

10.1109/ASIC.1994.404603

Filename

404603