Title :
Self-adaptive quasi-Gaussian circuits for analog on-chip-trainable multi-class classifiers
Author :
Xia, Wenjun ; Shibata, Tadashi
Author_Institution :
Dept. of Electr. Eng. & Inf. Syst., Univ. of Tokyo, Tokyo, Japan
Abstract :
Self-adaptive quasi-Gaussian circuits have been developed and introduced to an analog multi-class classifier in order to enhance its classification performance. By applying a floating threshold scheme to the quasi-Gaussian kernel, the kernel can extend its tail region adaptively according to the characteristics of input data. As a result, the misclassification problem due to the zero tail region in the quasi-Gaussian kernel has been completely eliminated, and the classification accuracy is significantly improved. Software simulation showed the performance is comparable to complex Gaussian-kernel Support Vector Machines. A proof-of-concept chip implementing an analog on-chip-trainable multi-class classifier which employs 64-dimensional self-adaptive quasi-Gaussian circuits was designed in a 0.18-μm CMOS technology and is now under fabrication. Its successful operation was confirmed by Nanosim simulation.
Keywords :
CMOS analogue integrated circuits; analogue integrated circuits; floating point arithmetic; 64-dimensional self-adaptive quasiGaussian circuits; CMOS technology; Nanosim simulation; analog multiclass classifiers; floating threshold scheme; misclassification problem; on-chip-trainable multiclass classifiers; quasiGaussian kernel; size 0.18 mum; software simulation; zero tail region; Accuracy; Kernel; Simulation; Support vector machines; Vectors; Very large scale integration;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6271919