DocumentCode
302205
Title
New pipelined architecture for DSP
Author
Noel, Jean ; Oklobdzija, Vojin G.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
Volume
1
fYear
1995
fDate
Oct. 30 1995-Nov. 1 1995
Firstpage
137
Abstract
DSPs have been applied to digital filtering, modems, transmultiplexers, speech processing, high-fidelity audio, and graphics. The new DSP is in the family of the scalar fixed point digital signal processor. The type of instructions are similar to the RISC instructions. The best aspects of the DSP are explained,including possible modifications in order to maximize the performance of the DSP. This paper compares the features found in the new architectures, pointing to areas of possible improvement in the new DSPs introduced by different research laboratories in the world. The architectural innovations and concepts as related to the pipeline structure and its benefits are described.
Keywords
digital arithmetic; digital signal processing chips; parallel architectures; pipeline processing; reduced instruction set computing; DSP chip; RISC instruction; architectural innovations; digital filtering; graphics; high-fidelity audio; modems; performance; pipeline structure; pipelined architecture for DSP; research laboratories; scalar fixed point digital signal processor; speech processing; transmultiplexers; Digital filters; Digital signal processing; Digital signal processors; Filtering; Graphics; Laboratories; Modems; Reduced instruction set computing; Speech processing; Technological innovation;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 1995. 1995 Conference Record of the Twenty-Ninth Asilomar Conference on
Conference_Location
Pacific Grove, CA, USA
ISSN
1058-6393
Print_ISBN
0-8186-7370-2
Type
conf
DOI
10.1109/ACSSC.1995.540528
Filename
540528
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