DocumentCode
3022325
Title
An Efficient R-Mesh Implementation of LDPC Codes Message-Passing Decoder
Author
Fernandez-Zepeda, J.A. ; Bourgeois, Anu G. ; McLaughlin, Steven W.
fYear
2005
fDate
04-08 April 2005
Abstract
In this paper we propose a constant-time parallel algorithm for implementing the message-passing decoder of LDPC codes on a two dimensional RMesh, trying to keep the number of processors small. The R-Mesh provides dynamic reconfiguration, hardware reuse, and flexibility to problem changes. To decode a different code, we may simply set up the required connections between the bit-nodes and check-nodes by modifying the initialization phase of the R-Mesh algorithm. No extra wiring or hardware changes are required, as compared to other existing approaches. Moreover, the same hardware can implement the decoder in both probability and logarithm domains. We illustrate that the R-Mesh is an efficient model for parallel implementation of the decoder in terms of time complexity, flexibility to problem changes and simplicity of routing messages.
Keywords
computational complexity; decoding; message passing; parallel algorithms; parity check codes; probability; LDPC codes; R-Mesh algorithm; dynamic reconfiguration; logarithm domains; message-passing decoder; parallel algorithm; probability; time complexity; Computer science; Digital video broadcasting; Field programmable gate arrays; Hardware; Iterative decoding; Parallel algorithms; Parallel architectures; Parity check codes; Signal to noise ratio; Wireless LAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
Print_ISBN
0-7695-2312-9
Type
conf
DOI
10.1109/IPDPS.2005.91
Filename
1420099
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