• DocumentCode
    3022477
  • Title

    Configuring the Circuit Switched Tree for Multiple Width Communications

  • Author

    Roy, Krishnendu ; Vaidyanathan, Ramachandran ; Trahan, Jerry L.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Louisiana State Univ., Baton Rouge, LA, USA
  • fYear
    2005
  • fDate
    04-08 April 2005
  • Abstract
    Dynamically reconfigurable architectures offer extremely fast solutions to various problems. The Circuit Switched Tree (CST) is an important interconnect used to implement such architectures. A CST consists of processing elements (PEs) and switches. PEs communicate among themselves using the links of the tree. A key component for successful communication is scheduling individual communications and the configuration of the CST switches. This paper presents a scheduling and configuration algorithm for communications on a CST where conflicts force multiple rounds of routing to perform all communications. The paper also explains how to apply the algorithm to two important classes of communications, well-nested and monotonic, for which the algorithm is optimal and efficient. The algorithm is distributed and requires only local knowledge, yet it captures the global picture to ensure proper communication.
  • Keywords
    configuration management; multicast communication; multiprocessor interconnection networks; processor scheduling; reconfigurable architectures; circuit switched tree; configuration algorithm; dynamic reconfigurable architecture; interconnection networks; multiple width communications; processing elements; scheduling; Communication switching; Computer architecture; Field programmable gate arrays; Integrated circuit interconnections; Multiprocessor interconnection networks; Reconfigurable architectures; Routing; Scheduling algorithm; Switches; Switching circuits; Dynamic Reconfiguration; Interconnection Networks; Reconfigurable Models; Scheduling and Configuration Algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International
  • Print_ISBN
    0-7695-2312-9
  • Type

    conf

  • DOI
    10.1109/IPDPS.2005.149
  • Filename
    1420106