DocumentCode
3023480
Title
Simulation of nanoscale dual-channel strained Si/Strained Si1−y Gey /Relaxed Si1−x Gex PMOSFET
Author
Yu Chan Thien ; Eng Siew Kang ; Ismail, Riyad
Author_Institution
Fac. of Electr. Eng. (FKE), Univ. Teknol. Malaysia (UTM), Skudai, Malaysia
fYear
2012
fDate
19-21 Sept. 2012
Firstpage
97
Lastpage
101
Abstract
In this paper, the effects of several parameters on the threshold voltage of nanoscale dual-channel strained Si/Strained Si1-yGey/relaxed Si1-xGex PMOSFET are investigated using SILVACO TCAD tools. The aspects discussed include strain induced at the channel, channel length, oxide thickness and substrate doping concentration. The electrical characteristics such as current-voltage relationship, subthreshold swing, drain induced barrier lowering and threshold voltage are investigated for 45nm channel length dual-channel strained Si/Strained Si1-yGey/relaxed Si1-xGex PMOSFET. The quantum mechanical effects that arise in sub-nanometer regime are explained in detail. The simulated results show good agreement with the developed analytical model with the incorporation of quantum mechanical effects, showing the accuracy of the obtained results.
Keywords
Ge-Si alloys; MOSFET; semiconductor doping; SILVACO TCAD tools; Si-Si1-yGey-Si1-xGex; channel length; current-voltage relationship; drain induced barrier; electrical characteristics; nanoscale dual-channel strained-relaxed PMOSFET; oxide thickness; quantum mechanical effects; size 45 nm; subnanometer regime; substrate doping concentration; subthreshold swing; threshold voltage; Doping; Logic gates; MOSFET circuits; Quantum mechanics; Silicon; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4673-2395-6
Electronic_ISBN
978-1-4673-2394-9
Type
conf
DOI
10.1109/SMElec.2012.6417100
Filename
6417100
Link To Document