Modelling and dimensioning of an integrated circuit and packet switching scheme on-board a processing satellite

We analyse a satellite communication system including a processing satellite (PS) performing circuit and packet switching. The switching scheme is based upon the separation of the incoming traffic in two components: isochronous (V, voice and video) and non-isochronous (D, data). These two components are simultaneously supported by a TDMA protocol. The V traffic burstiness can be used to increase significantly the overall system throughput; also, a potential statistical gain can be reaped by packet switching the D traffic. The system analysed succeeds in exploiting both the above features. We model analytically the system at hand, by using sophisticated queueing models, that allow a very accurate performance evaluation and an easy dimensioning of the data buffers. The proposed model is validated with simulation results produced with a computer model of the whole system. Possible solutions for a congestion control scheme are also presented