DocumentCode :
3024015
Title :
A novel analog-to-residue conversion scheme based on clock overlapping technique
Author :
Qi Huang ; Di Zhu ; Siek, Liter
Author_Institution :
VIRTUS-IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
3206
Lastpage :
3209
Abstract :
Residue Number System (RNS) offers significant advantages over conventional number system in terms of parallel signal processing and power consumption. This makes it ideally suitable for communication, computer security, digital signal processing, in which long word addition and multiplication are involved critically. However, traditional Analog-Digital (binary)-Residue conversion scheme requires large silicon area and high power consumption. Therefore, direct Analog-to-Residue conversion starts to attract due attention from circuit designers and researchers. This paper describes a new approach to the direct conversion based on clock overlapping technique and the hardware complexity grows only logarithmically with the bit-resolution.
Keywords :
analogue-digital conversion; clocks; residue number systems; analog-digital-residue conversion; clock overlapping technique; computer security; digital signal processing; direct analog-to-residue conversion; hardware complexity; high power consumption; large silicon area; parallel signal processing; residue number system; Calibration; Clocks; Complexity theory; Frequency conversion; Hardware; Quantization; Radiation detectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6272005
Filename :
6272005
Link To Document :
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