Title :
A 20 Gbps 1-tap decision feedback equalizer with unfixed tap coefficient
Author :
Kim, Yong-Hun ; Kim, Lee-Sup
Author_Institution :
Dept. of Electr. Eng., KAIST, Daejeon, South Korea
Abstract :
This paper describes a 1-tap DFE with unfixed tap coefficient. According to the data patterns, the inter-symbol interference (ISI) is changed. The data patterns will be predicted using the DC level detector and the tap coefficient of the DFE will be adjusted to achieve high gain against high attenuation. The proposed 1-tap DFE with unfixed tap coefficient solves a high channel loss problem while it consumes low power. Designed in 65-nm CMOS technology, a 20 Gb/s receiver is composed of 1-tap half rate DFE with unfixed tap coefficient which compensates 20 dB attenuation, and it consumes 22.65 mW for 1-V supply.
Keywords :
CMOS analogue integrated circuits; decision feedback equalisers; intersymbol interference; 1-tap decision feedback equalizer; CMOS technology; DC level detector; DFE; ISI; bit rate 20 Gbit/s; data patterns; high channel loss problem; intersymbol interference; power 22.65 mW; size 65 nm; unfixed tap coefficient; voltage 1 V; Adders; Attenuation; CMOS integrated circuits; Decision feedback equalizers; Detectors; Gain;
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-0218-0
DOI :
10.1109/ISCAS.2012.6272006