DocumentCode
3024570
Title
A word/bit parallel inexact match content addressable memory
Author
Daasch, W. Robert ; Lee, Jack
Author_Institution
Dept. of Electr. Eng., Portland State Univ., OR, USA
fYear
1994
fDate
19-23 Sep 1994
Firstpage
25
Lastpage
28
Abstract
The design of a content addressable memory (CAM) is described which evaluates Hamming distances greater than zero between the search key and the stored data with a word/bit parallel search instead of the word parallel/bit serial search used by other CAMs. This word/bit parallel searching makes this new CAM as efficient as existing CAMs for computations that require best match or other non-zero Hamming distances. Fully functional prototype chips have been fabricated using a 2μ CMOS technology
Keywords
CMOS memory circuits; content-addressable storage; memory architecture; search problems; string matching; 2 micron; CMOS technology; best match; computation; content addressable memory; design; inexact match; nonzero Hamming distances; word/bit parallel search; Associative memory; CADCAM; CMOS technology; Cams; Computer aided manufacturing; Databases; Hamming distance; High definition video; Multivalued logic; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location
Rochester, NY
Print_ISBN
0-7803-2020-4
Type
conf
DOI
10.1109/ASIC.1994.404617
Filename
404617
Link To Document