• DocumentCode
    302467
  • Title

    Bifurcational communication with novel chaotic transistors circuits

  • Author

    Pham, Cong-Kha ; Tanaka, Mamoru

  • Author_Institution
    Tokyo Univ. of inf. Sci., Japan
  • Volume
    3
  • fYear
    1996
  • fDate
    12-15 May 1996
  • Firstpage
    100
  • Abstract
    In this paper, a bifurcational communication employing Chaotic Transistors circuits is described. The bifurcation phenomena has found along with a variation of a sampling clock frequency in the Chaotic Transistors circuit, and also a synchronization phenomena between two Chaotic Transistors circuits has been found. The synchronization phenomena is skillfully utilized to perform the bifurcational communication, in which the sampling clock frequency of a transceiver circuit is used as an information which will be recovered at a receiver circuit when the synchronization phenomena between the transceiver circuit and the receiver circuit is retrieved
  • Keywords
    bifurcation; chaos; nonlinear network analysis; synchronisation; transceivers; transistor circuits; bifurcational communication; chaotic transistor circuit; receiver; sampling clock frequency; synchronization; transceiver; Bifurcation; Chaotic communication; Circuits; Clocks; Frequency synchronization; Inverters; MOS capacitors; MOSFETs; Sampling methods; Transceivers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.541490
  • Filename
    541490